1. Field of the Invention
The present invention relates to a semiconductor device comprising a plurality of semiconductor elements connected in parallel, and wires connected to these semiconductor elements, which take the form of multi-layered wires.
2. Description of the Related Art
A semiconductor element, typically a MOSFET, comprises a semiconductor substrate 1 as shown in FIG. 8, in which impurity-diffused layers 2, 3 are formed as a source and a drain. On an insulator 4 above the semiconductor substrate 1, a gate electrode 5 is formed across both the diffused layers 2, 3. The diffused layers 2, 3 are connected to other elements through a first wire 6 and a second wire 7, respectively. Generally, the source and drain wires 6, 7 are required to allow for a larger current flow therein than in the gage wire and accordingly use a metal such as Al and Cu as wiring material in general.
The semiconductor device of such the type has no particular problem if the current flowing in the source and drain has a value as relatively small as several mA or below. In contrast, if the current flowing in the semiconductor device has a value of several 10 mA or several 100 mA, the current capacity limit per element requires the use of a structure having a plurality of elements connected in parallel. A length L in the wire stretching direction as shown in FIG. 9 denotes an effective length of the elements which are connected to one wire. An enhancement of the current capacity setting in the semiconductor device requires an increase in the number of elements connected in parallel and an extension of the length L. A problem arises herein about the maximum allowable current density in the wire. In leads from the wires 6, 7 to outside the element, or connections X with common wires 8, 9, current flows by (current per unit length)×L. Therefore, the length L elevates the possibility of the current density that exceeds the maximum allowable current density at the leads X from the wires 6, 7 to outside the element. When the current density exceeds the maximum allowable current density, electrons flowing through the wire collide with component atoms of wire material at an elevated frequency. This may possibly cause an electro-migration failure that breaks the wire. A wider wire width can increase the limit current per wire though it results in an increase in element area undesirably.
On the other hand, a wire may take the form of multi-layered wires. In addition, a wiring layer, in which a large current flows, may adopt a two-layered structure of a Cu wiring layer and an Al wiring layer. This is effective to thicken part of the film thickness to allow for a large current flow as in a known semiconductor device (JP-A 2003-151982, paragraph 0011, FIG. 1). The height of a wire may be increased partly to allow for a large current flow as in another known semiconductor device (JP-A8-46049, paragraph 0010, FIG. 1). The semiconductor devices disclosed in the above-described Patent Documents 1, 2, however, are not given any considerations about the problem associated with partial concentration of the current density when a plurality of semiconductor elements are connected in parallel.